Image sensors can be used in a variety of applications, such as digital still cameras, PC cameras, digital camcorders and Personal Communication Systems (PCS), as well as analog and digital TV and video systems, video game machines, security cameras and micro cameras for medical treatment. With the development of the telecommunication and computer system, the demand for image sensors will be much more increased.
An image sensor cell typically has a photodiode element that is capable of converting light (e.g., visible light, infrared light and ultraviolet light) into electric signals. When photons are absorbed, electron-hole pairs are created through photoelectric conversion. A depletion region is formed in a photodiode when the photodiode is reverse-biased. The electric field in the depletion region separates the electron-hole pairs, which generated from the photoelectric conversion.
The electric current generated from the photoelectric conversion can be directly measured to determine the intensity of the light. However, the signal generated from the direct measurement of the current from the photoelectric conversion typically has a poor signal to noise (S/N) ratio. Thus, a typical image sensor accumulates the charges generated from the photoelectric conversion for a predetermined period; and, the amount of accumulated charges is measured to determine the intensity of the light.
To measure the accumulated (photoelectric) charges, a CMOS (Complementary Metal-Oxide Semiconductor) Active Pixel Sensor (APS) contains active circuit elements (e.g., transistors) for measuring the signal associated with the accumulated photoelectric charges. Alternatively, the accumulated charges can be moved out of an image sensor cell for measurement (e.g., in a CMOS Passive Pixel Sensor (PPS) or in a Charge Coupled Device (CCD) image sensor). In order to prevent noise, a CCD image sensor uses a complicated process to transfer the accumulated charges from the sensor cell to an amplifier for measurement. A CCD device uses complicated driving signals of large voltage swings, and thus, consumes a lot of power. A typical CCD fabrication process is optimized for charge transfer; and it is not compatible with a standard CMOS process. Thus, a CCD image sensor is difficult to be integrated with signal processing circuitry, which is typically implemented by Complementary Metal-Oxide Semiconductor (CMOS) circuitry, and thus, difficult to be implemented in a wider variety of applications.
CMOS image sensors include two portions. The first portion is a sensor array that converts a photon signal to an electric signal; and the second part is accessory circuits that include analog circuits for signal read out and logic control circuits. A standard CMOS process is employed to fabricate such as CMOS image sensors. FIG. 1 is a cross-sectional view of a prior art CMOS image sensor which includes a P channel transistor. (shown left in the figure), an N channel transistor (shown center in the figure) and a Photo diode (shown right in the figure).
Referring now to FIG. 1, a conventional CMOS image sensor 100 starts with a P+ type semiconductor material substrate 102. A P− type semiconductor material EPI layer 104 is then layered on top of a P+ substrate 102. A P− EPI layer 104 has a resistance around 8Ω˜12Ω and a boron doping density of approximate 2×1015 atom/cm3. Subsequently, the Shallow Trench 106 is formed. The Shallow Trench Isolation process, a common practice in current CMOS sensor manufacture, allows a much lower dark current than the traditional LOCOS process (local oxidation process).
After the STI 106 is formed, N wells 108 and P wells 110 are implanted separately. Then the poly gate 122 is formed. After the poly gate 122 is formed, N+ 114 and P+ 112 are implanted to form the CMOS transistor source and drain. The Photo diode 140 is formed by an N well 108/P sub 104 junction. For most popular three transistors active pixel cell, the N+ 114 implant contacts with the N well 108 in the photo diode 140 and outputs photo converted voltage which is the output signal of the photo diode 140.
After the transistor source and drain are formed, an oxide layer 124 is deposited, a process of chemical and mechanical polishing (CMP) is used and the contact 116 is formed. The backend process continues to form a Metal 1 Layer 126a, deposits an Oxide layer 125, a process of CMP is used, and Vial 117 is formed. The backend is repeated to form a desired number of metal layers.
Referring now again to FIG. 1, there also shows a double layer metal process. After a top layer metal 126b is formed, the High Density Plasma Enhanced CVD process deposits about 8000 Angstrom oxide layer 128 to the wafer top. The High Density Plasma Enhanced CVD process is followed by depositing about 5000 Angstrom Si3N4 CVD layer 130 for passivation. For a conventional CMOS image sensor, above passivation layer, a Spin-On-Glass (SOG) layer 132 is needed for planarization. Then a color filter layer 134 is added. Subsequently, a micro-lens 138 is formed. A Micro-lens can significantly increase the sensor pixel sensitivity because it focuses the light to photo diode sense area.
The conventional CMOS image sensor process has two disadvantages. The first disadvantage is that poor MTF (modulate transfer function) and high noise caused by charge diffusion in substrate field-free region. The photo diode is formed by N well to P−EPI junction (or N+ to P−EPI junction). The N well is set to high voltage around 2V. The P−EPI and P+ substrate are linked to the ground. The N well/P sub photo diode depletion layer is around 1˜3 um deep. Below the depletion area is the P−EPI and P+ substrate layer which is at some potential level and is an electric field free region. It's well known that in silicon, long wave-length light can penetrate much deeper than above mentioned photo diode depletion region.
For example, a red light (wave length ˜7000 Angstrom) silicon absorption depth is 4.7 um. A lot of photo generated electron and hole pairs are in the P−EPI/P+Sub field free region instead of the photo diode depletion region. If the photo generated electron/hole is in the photo diode depletion region, the electrons will be kept in the N well node. The holes will be repealed to the substrate. The electrons accumulated in the N well node will respond to the input light density. However, if the photo generated electron/hole is in the P−EPI/P+sub field free region. The electrons/hole pairs will move in the substrate by temperature vibration. Some of the electrons/hole pairs will be recombined in the substrate However, there are still a significant amount of electrons that will be diffused to the neighbor photo diodes and cause poor MTF and high noise. The diffusion length, which is approximately a few millimeters, is much longer than a typical pixel cell size, which is approximately a few micrometers.
The second disadvantage is the large distance between the micro-lens 138 to the photo-sensitive silicon region (N well 108/P−EPI 104). Because modern CMOS process has quite many metal layers (e.g., 126a and 126b), together with an image sensor planariztion layer 132 and a color filter layer 134. This large distance will lower the sensor sensitivity and cause the optical cross talk problems between sensor pixels.
Therefore, there is a need for a CMOS image sensor that produces high MTF, low noise and short distance from micro-lens to silicon surface.